Most inverter-connected generation is designed to work in “grid-connected” mode. This means that it treats the PCC (point of common coupling) as a reasonably stiff voltage source (e.g. such that an impedance between the PCC and the transmission network is small compared to a per-unit inverter impedance, and such that the transmission network can be treated as an infinite bus). In this mode, the inverter switching bridge can generally be controlled so that it produces controlled currents which result in controllable active and re-active power exports [1]. To control the currents with adequate fidelity to avoid damage to switches during faults generally requires high-bandwidth inner current loops with bandwidths of at least 1000 rad/s (at least 160 Hz) [2] for 50 Hz systems.
An inner current loop can be viewed as controlling an inverter based on a nominal output current, e.g. which take the form of “ideal” (“target” or “reference”) currents, and usually involves the use of current limits so as to avoid the currents produced by the inverter from becoming too high. Current limits are generally easy to employ, since the reference currents can be clipped to levels safely below those which would cause damage to the solid-state inverter components.
To use such inner current loops, the target currents (the current references) generally need to be determined by mathematical methods or by outer control loops. This process is relatively easy during normal grid-connected operation, and there are multiple references to this (for example, [1], [3], [4]).
For inverters using inner current loops, it is not always obvious what the reference currents should be. This is particularly true in islanded or small power system operation when loads may be unbalanced or contain harmonic components, or during fault scenarios.
For example, in islanded scenarios, the required currents are determined by the connected loads (or other generators). If a new load is switched on, the currents must generally change to meet that new load. The loads may be unbalanced, and may even be single-phase loads. The loads may draw harmonic currents. Such issues have traditionally been addressed for UPS (Uninterruptible Power Supplies) by the use of “deadbeat” or similar controllers which determine the currents required to produce clean, balanced sinusoidal voltages at the UPS output terminals, at the target voltage magnitude and frequency. For example [5] [6]. Such schemes are established for the control of single inverter feeding a small power network. The schemes do not generally extend well to the use of multiple parallel inverters feeding the same network, due to the multiple controllers attempting to force frequency and voltage at closely coupled points of common coupling (PCC) (described in [7]). Parallel operation of such inverters generally requires high switching frequencies and also dedicated high-bandwidth communications between inverters. High switching frequencies are generally required since the switching frequency can limit the bandwidth of the inner current loop, which in turn can place limits on the bandwidths of any outer control loops which determine the current references.
For inverters of significant size (100 kW or more), switching speed is limited due to the acceptable switching losses. Switching frequencies of 1.5-4 kHz are typical. These switching frequencies generally preclude the use of dual nested current and voltage control loops, since the bandwidth of the voltage control loop will not be high enough to control the actual voltages to meet the balanced sinusoidal targets, leading to poor voltage power quality. In particular, if a load is added or removed, the finite control response time will result in voltage transients on the network, as the inverter transiently outputs currents which are incorrect to match the demand.
An alternative, in islanded scenarios, is the use of lower switching frequencies and lower bandwidth inner current loops, coupled to a voltage control loop, including droop controls which allows multiple inverters to be used in parallel, without high bandwidth communications. This is described in [7]. It requires the use of accurate state-space models of the filter inverter network, and Kalman filters to predict the response [8]. Although promising, this method has not yet been demonstrated in the public domain beyond simple use cases (i.e. balanced, sinusoidal, non-fault conditions).
During fault scenarios, the determination of the “ideal” currents to source can also be problematic. The emerging grid codes for renewable power sources and large inverters (or amalgamations of many small inverters) generally state that “maximum reactive power” should be exported by the inverter during a voltage dip (fault) [9] [10] [11] [12]. For three-phase faults, the reference currents can usually be determined relatively easily. For unbalanced faults, or faults containing transients or harmonics, it is often not clear what the ideal reference current should be, without intimate knowledge of the fault impedances. Thus, for example, a grid-code compliant response is shown in [4] for an unbalanced fault, by sourcing balanced currents, while [13] compares three control schemes which produce different balanced and unbalanced currents in response to the same fault conditions. While generally acceptable when connected to large “stiff” grids, such fault response would be highly undesirable within a power system which is not so stiff, or which contains a high proportion of inverter-connected sources with such a response. This is because the balanced “reactive” currents sourced into an unbalanced fault may result in significant voltage unbalance, possibly including overvoltage on un-faulted phases.
The conventional response of generating plant within power systems is provided by large synchronous generators. During faults, these generally behave as a balanced, sinusoidal voltage source, with a high rotational inertia, connected to the PCC via a transient inductance [14], which is typically in the region of 5-15% of the per-unit impedance of the machine. This generally gives rise to currents in the region of 6-20 times the rated values of the machine, for the duration of the fault. This may be acceptable for a wound machine for short periods of time, e.g. causing temperature rise in the windings but not permanent damage. The response of such machines is normally to continue sourcing balanced sinusoidal voltages. The currents which flow are generally determined by the fault impedances (balanced or unbalanced) and the network topology. Note that the action of the machine is generally always to tend to restore the voltages at the PCC to the balanced 1 pu sinusoidal case, and the rotational inertia tends to stabilise the frequency. The voltages at the PCC will generally not be held exactly to the balanced 1 pu sinusoidal condition, due to the finite value of the machine transient reactance. This reactance can also limit the currents which flow, to allowable levels (the “fault level”).
Such response is highly desirable from inverters, during faults. However, in general this is not economically possible since the solid-state switching devices within the inverter may be damaged if any peak current greater than, for example, 2 pu (per-unit) flows for even a single part of a cycle. This is because allowing higher values of overcurrent require more expensive switch devices, or multiple switch devices in parallel.
In general terms, the inventor has found inner current loops to work well during “grid-connected” operation, but less well during “islanded” operation, especially if a fault develops.
None of the known methods for providing islanded or fault ride-through operation of inverters allows the use of an inner voltage (rather than inner current) control loop to provide a synchronous generator type response, while also providing overcurrent protection for the inverter devices, and also allowing the inverter to continue operation to ride-through the fault. An inner voltage loop can be viewed as controlling an inverter based on a nominal output voltage, e.g. a balanced three-phase voltage of nominal amplitude at 50 Hz.
The present invention has been devised in light of the above considerations.